Solid-state data storage devices, which use non-volatile NAND flash memory technology, are being pervasively deployed in various computing and storage systems. In addition to one or multiple NAND flash memory chips, each solid-state data storage device must contain a controller (in-storage) that manages all the NAND flash memory chips. The storage device controller aims to optimally serve the user I/O requests with the best possible performance. Meanwhile, the storage device controller is also responsible for background operations such as garbage collection (GC), which invoke extra flash memory read/write activities. When scheduling all these flash memory read/write activities in response to normal I/O requests and internal background operations, the storage device controller may include logic to rearrange the order of I/O request processing. The rearrangement could however introduce data atomicity and consistency issues in which data is processed in a detrimental manner.
In current practice, applications and operating systems typically apply write barriers (e.g., the fsync system call) to I/O requests so that storage device controllers will not introduce any atomicity and consistency issues no matter how storage devices rearrange the processing order. This however tends to come with a significant system performance penalty. Moreover, such write barriers cannot deal with the case when background operations inside storage devices (e.g., GC) are triggered.